Registers Used in UART Programming
1. SBUF Register
The Serial Buffer (SBUF) Register is the register used for serial communication using UART. The SBUF is actually two separate registers, a transmit buffer and a receive buffer register. When data is moved to SBUF, it goes to the transmit buffer where it is held for serial transmission. (Moving a byte to SBUF is what initiates the transmission.) When data is moved from SBUF, it comes from the receive buffer.
2. SCON Register
The Serial Control (SCON) Register is responsible to the data frame format, enabling of serial reception, etc. It is composed of 8 bits with each bit having a unique purpose. The SCON Register is both byte-addressable and bit-addressable.

| 7 | FE | Framing Error bit (SMOD0=1).Clear to reset the error state, not cleared by a valid stop bit.Set by hardware when an invalid stop bit is detected.SMOD0 must be set to enable access to the FE bit | |||||||||||||||||||||||||
| SM0 | Serial port Mode bit 0. Refer to SM1 for serial port mode selection.SMOD0 must be cleared to enable access to the SM0 bit | ||||||||||||||||||||||||||
| 6 | SM1 | Serial port Mode bit 1
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| 5 | SM2 | Serial port Mode 2 bit / Multiprocessor Communication Enable bit. Clear to disable multiprocessor communication feature. Set to enable multiprocessor communication feature in mode 2 and 3, and eventually mode 1. This bit should be cleared in mode 0. | |||||||||||||||||||||||||
| 4 | REN | Reception Enable bit. Clear to disable serial reception. Set to enable serial reception. | |||||||||||||||||||||||||
| 3 | TB8 | Transmitter Bit 8 / Ninth bit to transmit in modes 2 and 3. Clear to transmit a logic 0 in the 9th bit. Set to transmit a logic 1 in the 9th bit. | |||||||||||||||||||||||||
| 2 | RB8 | Receiver Bit 8 / Ninth bit received in modes 2 and 3. Cleared by hardware if 9th bit received is a logic 0. Set by hardware if 9th bit received is a logic 1. In mode 1, if SM2 = 0, RB8 is the received stop bit. In mode 0 RB8 is not used. | |||||||||||||||||||||||||
| 1 | TI | Transmit Interrupt flag. Clear to acknowledge interrupt. Set by hardware at the end of the 8th bit time in mode 0 or at the beginning of the stop bit in the other modes. | |||||||||||||||||||||||||
| 0 | RI | Receive Interrupt flag. Clear to acknowledge interrupt. Set by hardware at the end of the 8th bit time in mode 0 |
The most commonly used UART mode is Mode1 (8-bit, 1 start bit, 1 stop bit, no parity bit). In this tutorial, we will concentrate on Mode1 only.
