What are External Interrupts
AT89C2051 has two external interrupts. These external interrupt inputs are located at pins P3.2 and P3.3. Pins P3.2 and P3.3 are also designated as INT0 and INT1, respectively.
The external interrupts are either edge-activated or level-activated. If an interrupt is level-activated, the interrupt is triggered when a low signal is applied to the input of the external interrupt. If an interrupt is edge-activated, the interrupt is triggered when a high-to-low signal is applied to the input of the external interrupt.
TCON Register
The TCON is already introduced in 8051 Tutorial 4: 8051 Timer/Counter Programming in C. Aside from controlling the Timer/Counter of AT89C2051, it is also responsible to the operational mode of AT89C2051′s external interrupts.
| IE1 | Interrupt 1 edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt processed. |
| IT1 | Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts. |
| IE0 | Interrupt 0 edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt processed. |
| IT0 | Interrupt 0 type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts. |
Programming External Interrupts
1. Initialize the external interrupts to be used. Select if the external interrupt is edge-activated/level-activated by setting/clearing the IT0 for external interrupt 0 or IT1 for external interrupt 1.
2. Enable which external interrupt is to be used by setting EX0 or EX1 of IE register.
3. Enable global interrupts by setting EA of IE register.
Example:
Given the circuit below, write the program that will turn the LED on when S1 is pressed once and turn the LED off when S2 is pressed once.
Solution:
#include<reg51.h>sbit LED = P1^7;void turn_on(void) interrupt 0 { LED=1; }void turn_off(void) interrupt 2 { LED=0; }void main(void) { LED=0; //Turn LED off IT0=1; //set external interrupt 0 edge-triggered IT1=1; //set external interrupt 1 edge-triggered EX0=1; //enable external interrupt 0 interrupt EX1=1; //enable external interrupt 1 interrupt EA=1; //enable global interrupt while(1) //loop forever {;} }
The ISR for external interrupt 0 points to interrupt number 0 and the ISR for external interrupt 1 points to interrupt number 2. Notice that the flags of each external interrupts do not need to be cleared by software. The flags are automatically cleared by hardware after the ISRs are serviced.
The format of the ISRs of external interrupts are the following
void your_ISR(void) interrupt 0 //ISR for external interrupt 0
{
//your routine here
}
void your_ISR(void) interrupt 2 //ISR for external interrupt 1
{
//your routine here
}
nice post..well explained….thanx
how can we improve number of interrupt in 8051
I’m not very familiar with the 8051, but in most systems you can use a programmable interrupt controller (PIC) to handle, prioritize, or nest interrupts, and have it alert the processor using just one interrupt pin. In the processor’s interrupt handler code there can be more elaborate communication with the PIC to gather type/level/vector related data and respond accordingly.
I use the Intel 8259a regularly, but this is in a very outdated lab using mostly intel 8086 chips.
, it is itrpomant and it’s in the works. Wireless is such a broad topic and I’m trying to see how to best approach it.